Heinz Riener

Researcher, EPFL, Lausanne, Switzerland


Heinz Riener works as a researcher at the Integrated Systems Laboratory at EPFL, Lausanne, Switzerland in the group of Giovanni De Micheli. He holds a Ph.D. degree (Dr.-Ing.) in Computer Science from University of Bremen, Germany.

  • From 2015 to 2017 he worked at the German Aerospace Center (DLR), Bremen, Germany, in the group of Avionics Systems.
  • From 2011 to 2015 he worked at the University of Bremen, Germany, in the group of Reliable Embedded Systems.
His research interests are formal methods for computer-aided design and verification of hardware and software systems. Heinz Riener is member of the IEEE and of the ACM.

News

  • The paper The EPFL Logic Synthesis Libraries has been accepted by WOSET 2018.
     publication
  • I am organizing the special session Design Understanding: From Logic to Specification at the VLSI-SOC 2018 conference. special session
  • The paper Design Understanding: From Logic to Specification (special session) has been accepted by the VLSI-SOC 2018 conference. publication
  • The paper Exact Synthesis of ESOP Forms has been accepted by IWSBP 2018.
     publication
  • The paper Size Optimization of MIGs with an Application to QCA and STMG Technologies has been accepted by the NANOARCH 2018 conference.
     publication
  • The paper Generating Safety Guidance for Medical Injection with Three-Compartment Pharmacokinetics has been accepted by the ISVLSI 2018 conference. publication
  • The papers
    • Coverage-Guided CTL Property Enumeration for Understanding Models of Reactive Systems
    • The EPFL logic synthesis libraries
    have been accepted by IWLS 2018. publication
  • The paper Mining Latency Guarantees for RTL Designs has been accepted by the ISMVL 2018 conference. publication

Contact

Heinz Riener
EPFL IC ISIM LSI1
INF 339, Station 14
1015 Lausanne, Switzerland

+41 21 69 30914
heinz.riener@epfl.ch
www.epfl.ch
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