Heinz Riener

Researcher, EPFL, Lausanne, Switzerland


Heinz Riener works as a researcher at the Integrated Systems Laboratory at EPFL, Lausanne, Switzerland in the group of Giovanni De Micheli. He holds a Ph.D. degree (Dr.-Ing.) in Computer Science from University of Bremen, Germany.

  • From 2015 to 2017 he worked at the German Aerospace Center (DLR), Bremen, Germany, in the group of Avionics Systems.
  • From 2011 to 2015 he worked at the University of Bremen, Germany, in the group of Reliable Embedded Systems.
His research interests are formal methods for computer-aided design and verification of hardware and software systems.

News

  • The paper Mining Latency Guarantees for RTL Designs has been accepted by the ISMVL 2018 conference.

Selected Peer-Reviewed Publications

  • NEW Gadi Aleksandrowicz, Eli Arbel, Roderick Bloem, Timon D. ter Braak, Sergei Devadze, Görschwin Fey, Maksim Jenihhin, Artur Jutman, Hans G. Kerkhoff, Robert Könighofer, Shlomit Koyfman, Jan Malburg, Shiri Moran, Jaan Raik, Gerard Rauwerda, Heinz Riener, Franz Röck, Konstantin Shibin, Kim Sunesen, Jinbo Wan, Yong Zhao, Designing Reliable Cyber-Physical Systems, In Languages, Design Methods, and Tools for Electronic System Design, vol. 454, Springer, pp. 15-38, 2018. (Springer)
  • NEW Heinz Riener, Finn Haedicke, Stefan Frehse, Mathias Soeken, Daniel Große, Rolf Drechsler, Göschwin Fey, metaSMT: Focus on Your Application and not on Solver Integration, In Journal on Software Tools for Technology Transfer (STTT) 19(5), Springer, pp. 605-621, 2017. (Springer, GitHub)
  • Jan Malburg, Heinz Riener, Görschwin Fey, Mining Latency Guarantees for RT-level Designs, In 4th Workshop on Design Automation for Understanding Hardware Designs (DUHDe), Lausanne, Switzerland, 2017.
  • Heinz Riener, Rüdiger Ehlers, Görschwin Fey, Counterexample-Guided EF Synthesis of Boolean Functions, In 20th Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" (MBMV), pp. 67-74, Bremen, Germany, 2017. (Shaker, PDF)
  • Heinz Riener, Rüdiger Ehlers, Görschwin Fey, CEGAR-based EF Synthesis of Boolean Functions with an Application to Circuit Rectification, In 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 251-256, Tokyo, Japan, 2017. (IEEEXplore, PDF)
  • Gadi Aleksandrowicz, Eli Arbel, Roderick Bloem, Timon D. ter Braak, Sergei Devadze, Görschwin Fey, Maksim Jenihhin, Artur Jutman, Hans G. Kerkhoff, Robert Könighofer, Jan Malburg, Shiri Moran, Jaan Raik, Gerard K. Rauwerda, Heinz Riener, Franz Röck, Konstantin Shibin, Kim Sunesen, Jinbo Wan, Yong Zhao Designing Reliable Cyber-Physical Systems (Special Session at FDL), In 2016 Forum on Specification and Design Languages (FDL), pp. 1-8, Bremen, Germany, 2016. (IEEEXplore)
  • Heinz Riener, Görschwin Fey, Exact Diagnosis Using Boolean Satisfiability, In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Austin, TX, USA, 2016. (IEEEXplore)
  • Heinz Riener, Görschwin Fey, Counterexample-Guided Diagnosis, In 1st IEEE International Verification and Security Workshop (IVSW), pp. 1-6, Sant Feliu de Guixols, Catalunya, Spain, 2016. (IEEEXplore)
  • Niels Thols, Heinz Riener, Görschwin Fey, Equivalence Checking on ESL Utilizing A Priori Knowledge, In Forum on Specification and Design Languages (FDL), pp. 1-8, Bremen, Germany, 2016. (IEEEXplore)
  • Heinz Riener, Robert Könighofer, Görschwin Fey, Roderick Bloem, SMT-Based CPS Parameter Synthesis, In Applied Verification for Continuous and Hybrid Systems (ARCH@CPSWeek 2016), vol 43, pp. 126-133, Vienna, Austra, 2016. (Easychair proc., GitHub)
  • Niklas Krafczyk, Heinz Riener, Görschwin Fey, WCET Overapproximation for Software in the Context of a Cyber-Physical System, In IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), pp. 1-6, Tallinn, Estonia, 2016. (IEEEXplore)
  • Niels Thols, Heinz Riener, Görschwin Fey, Equivalence Checking on System Level Using A Priori Knowledge, In IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), pp. 177-182, Belgrade, Serbia, 2015. (IEEEXplore)
  • Heinz Riener, Rüdiger Ehlers, Görschwin Fey, Path-Based Program Repair, In 12th International Workshop on Formal Engineering approaches to Software Components and Architectures (FESCA), Satellite event of ETAPS, pp. 22-32, London, United Kingdoms, 2015. (EPTCS proc., arXiv)

Software

  • NEW 2018, esop_synthesis is a toolkit for finding Exclusive-or Sum Of Products (ESOP). (GitHub)
  • 2017, ParSyn-CEGIS is a flexible software framework for parameter synthesis and repair of cyber-physical systems. (GitHub)
  • 2016, metaSMT is an easy to use Embedded Domain Specific Language (EDSL) for C++ that integrates various decision procedures directly via one common API. (GitHub)
  • 2015, metaSMT-toolbox-smt2eval is a metaSMT toolbox project that allows reading and evaluating SMT-LIB2 instances utilizing a variety of different solving engines and techniques. Applications include portfolio solving of an SMT-LIB2 instance or cross-checking results of multiple solving engines. (GitHub)

Program Committees

  • NEW 3rd IEEE International Verification and Security Workshop (IVSW), Platja d’Aro, Costa Brava, Spain, July 2-4, 2018. (Link)
  • 2nd IEEE International Verification and Security Workshop (IVSW), Thessaloniki, Greece, July 3-5, 2017. (Link)
  • 1st IEEE International Verification and Security Workshop (IVSW), Sant Feliu de Guixols, Catalunya, Spain, July 4-6, 2016. (Link)

Invited Talks

  • February 2017, EPFL, Lausanne Switzerland: CEGAR-based EF Synthesis of Boolean functions with an Application to Circuit Rectification (More information)
  • April 2016, ARTEMIS Industrial Association, Vienna, Austria: Immortalizing Many-Core Based Cyber-Physical Systems (More information)
  • December 2012, Duke Univeristy, Durham, NC, USA: Test Case Generation from Mutants using Model Checking Techniques (More information)

Collaborators

  • Below is a list of some collaborators whom I worked with in the last years.

Contact

Heinz Riener
EPFL IC ISIM LSI1
INF 339, Station 14
1015 Lausanne, Switzerland

+41 21 69 30914
heinz.riener@epfl.ch
www.epfl.ch
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