Heinz Riener
Researcher, EPFL, Lausanne, Switzerland
Heinz Riener works as a researcher in computer-aided design and verification. He holds a Ph.D. degree (Dr.-Ing.) in Computer Science from University of Bremen, Germany.
- From 2017 to 2021 he worked at the Integrated Systems Laboratory at EPFL, Lausanne, Switzerland.
- From 2015 to 2017 he worked at the German Aerospace Center (DLR), Bremen, Germany, in the group of Avionics Systems.
- From 2011 to 2015 he worked at the University of Bremen, Germany, in the group of Reliable Embedded Systems.
News
- The paper An Automated Testing and Debugging Toolkit for Gate-Level Logic Synthesis Applications has been accepted by IWLS 2021.
- The article Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits has been accepted for publication in Transactions on Computer-Aided Design of Integrated Circuits and Systems. publication
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The paper
- Beyond Local Optimality of Buffer and Splitter Insertion for AQFP Circuits
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The paper
- Optimizing Adiabatic Quantum-Flux-Parametron (AQFP) Circuits using an Exact Database
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The papers
- A Versatile Mapping Approach for Technology Mapping and Graph Optimization
- Boolean Rewriting Strikes Back: Reconvergence-Driven Windowing Meets Resynthesis
- The article A Simulation-Guided Paradigm for Logic Synthesis and Verification has been accepted for publication in Transactions on Computer-Aided Design of Integrated Circuits and Systems. publication
- The article Efficient Boolean Methods for Preparing Uniform Quantum States has been accepted for publication in Transactions on Quantum Engineering. publication