Logic Synthesis Software School

mockturtle is a C++-17 logic network library. It provides several logic network implementations (such as And-inverter graphs, Majority-inverter graphs, and k-LUT networks), and generic algorithms for logic synthesis and logic optimization. mockturtle is part of the EPFL logic synthesis libraries, a collection of modular and open software libraries, to tackle problems in the field of logic synthesis.

tweedledum is an extensible and efficient open-source library for quantum circuit synthesis and compilation. It has state-of-the-art performance in many compilation tasks relevant to near-term applications. In this work, we introduce its design principles and concrete implementation. In particular, we describe the library’s core: an intuitive and flexible intermediate representation (IR) that supports different abstraction levels across the same circuit structure. We demonstrate the power of such flexibility through a use case in which we use tweedledum to compile an oracle defined by classical Boolean function into a quantum circuit. This oracle is part of a circuit implementing Grover’s search to solve an instance of vertex coloring. We compare this result against some hand-optimized implementations and show that our automated flow empowers users to implement oracles on higher-level abstractions while delivering highly-optimized results. We also present a use case in which we employ tweedledum to map technology-independent circuits to constrained quantum hardware architectures. Our results show that tweedledum is significantly faster than established frameworks while delivering competitive quality of the results.

GitHub: mockturtle • tweedledum

In this talk, we will introduce our recent effort in developing a logic synthesis platform, named LSOracle, whose goal is to achieve/approach global optimality by partitioning and classifying portions of a complete logic design, in order to apply ad-hoc logic optimizations (MIGs and other). Indeed, in spite of relying on a single data structure and class of heuristics (like ABC), LSOracle is capable of representing and optimizing logic using several Boolean representations (AIGs, MIGs, XMGs) and manipulate independent partitions back and force between those representations to select the best Power-Performance-Area (PPA) improvements per partition. The structure of LSOracle also lends itself naturally to massively parallel optimization and cloud-based deployments.

GitHub: LSOracle

Pierre-Emmanuel Gaillardon is an associate professor in the Electrical and Computer Engineering (ECE) department and an adjunct assistant professor in the School of Computing at The University of Utah, Salt Lake City, UT, where he leads the Laboratory for NanoIntegrated Systems (LNIS). He holds an Electrical Engineer degree from CPE-Lyon, France (2008), a M.Sc. degree in Electrical Engineering from INSA Lyon, France (2008) and a Ph.D. degree in Electrical Engineering from CEA-LETI, Grenoble, France and the University of Lyon, France (2011). Prior to joining the University of Utah, he was a research associate at the Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland within the Laboratory of Integrated Systems (Prof. De Micheli) and a visiting research associate at Stanford University, Palo Alto, CA, USA. Previously, he was research assistant at CEA-LETI, Grenoble, France. Prof. Gaillardon is recipient of the C-Innov 2011 best thesis award, the Nanoarch 2012 best paper award, the BSF 2017 Prof. Pazy Memorial Research Award, the 2017 NSF CAREER award, the 2018 IEEE CEDA Pederson Award, the 2018 ChemE Education William H. Corcoran best paper award, the 2019 DARPA Young Faculty Award, the 2019 IEEE CEDA Ernest S. Kuh Early Career Award and the 2020 ACM SIGDA Outstanding New Faculty Award. He has been serving as TPC member for many conferences, including DATE, DAC, ICCAD, Nanoarch, etc. He is an associate editor of IEEE TNANO and a reviewer for several journals and funding agencies. He served as Topic co-chair "Emerging Technologies for Future Memories" for DATE'17-19. He is a senior member of the IEEE. The research activities and interests of Prof. Gaillardon are currently focused on the development of novel computing systems exploiting emerging device technologies and novel EDA techniques.

A fundamental question in Deep Learning today is the following: Why do neural networks generalize when they have sufficient capacity to memorize their training set. In this talk, I will describe how ideas from logic synthesis can help answer this question. In particular, using the idea of small lookup tables, such as those used in FPGAs, we will see if memorization alone can lead to generalization; and then using ideas from logic simulation, we will see if neural networks do in fact behave like lookup tables. Finally, I’ll present a brief introduction to a new theory of generalization for deep learning that has emerged from this line of work.

GitHub: ABC

Satrajit Chatterjee is an Engineering Leader and Machine Learning Researcher at Google AI. His current research focuses on fundamental questions in deep learning (such as understanding why neural networks generalize at all) as well as various applications of ML (such as hardware design and verification). Before Google, he was a Senior Vice President at Two Sigma, a leading quantitative investment manager, where he founded one of the first successful deep learning-based alpha research groups on Wall Street and led a team that built one of the earliest end-to-end FPGA-based trading systems for general purpose ultra-low latency trading. Prior to that, he was a Research Scientist at Intel where he worked on microarchitectural performance analysis and formal verification for on-chip networks. He did his undergraduate studies at IIT Bombay, has a PhD in Computer Science from UC Berkeley, and has published in the top machine learning, design automation, and formal verification conferences.